The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 02, 2001
Filed:
Jan. 19, 1999
Jeong-Hwan Son, Daejon, KR;
Hyundai Electronics Industries Co., Ltd., Kyoungki-do, KR;
Abstract
A method for fabricating an embedded semiconductor device in which a logic device and a memory device are integrated into one semiconductor substrate is disclosed, which includes the steps of forming a device isolation region and active region on a semiconductor substrate having a first region and a second region, forming a gate insulation film on a predetermined portion of an upper surface of the active region of the first region and second region, forming a first conductive film pattern and a protection film pattern on the gate insulation film, forming a first side wall spacer on the lateral surfaces of the first conductive film pattern and the protection film pattern, forming source/drain by implanting a dopant into the surface of the semiconductor substrate at both sides of the first side wall spacer, forming a second side wall spacer on an outer surface of the first side wall spacer, removing the protection film pattern, and forming a second conductive film pattern on the upper surfaces of the first conductive film pattern of the first and second regions and the source/drain of the second region, so that it is possible to decrease the number of fabrication processes for thereby enhancing the productivity.