Method for forming a deep trench capacitor of a dram cell

Abstract

A method of forming a DRAM cell with a trench capacitor over a semiconductor substrate comprises the following steps. First, an etching step is performed to form a trench structure in the substrate, wherein the trench structure has a bottom and sidewalls, and the sidewalls are adjacent to the bottom. And each the sidewall includes an upper sidewall adjacent to the substrate through a insulating layer and a lower sidewall adjacent to the substrate through a dielectric layer. Then, after the etching steps, a doped area is formed on the bottom and the lower sidewall for serving as the first electrode of the trench capacitor. A first conducting layer is formed on the doped area and the insulating layer above a portion of the upper sidewall to serve as a first capacitor electrode. Next, the dielectric layer is formed on an outer surface of the first conducting layer and a portion of the upper sidewalls, a second conducting layer is formed to fill into the trench structure for serving as a second capacitor electrode, wherein the second conducting layer being coupled electrically with a drain structure.