The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 18, 2001
Filed:
Mar. 28, 2000
Isao Nojima, Los Altos, CA (US);
Silicon Storage Technology, Inc., Sunnyvale, CA (US);
Abstract
A high-voltage isolating circuit for controlling the discharge of high-voltage a memory array is provided comprising a line connected to individual memory cells of the memory array, the line having both a high-voltage portion and a low-voltage portion, such that the line is capable of providing a high-voltage and a low-voltage to the memory cells; and an isolation transistor having a first source/drain terminal coupled with the high-voltage portion of the line and an opposing source/drain terminal coupled with the low-voltage portion of the line. Further, the substrate of the transistor is coupled with the high-voltage portion of the line, such that the voltage potential of the line can be maintained within a certain voltage range when the low-voltage portion of the line is at a first voltage potential, and wherein the high-voltage portion of the line can be discharged when the low-voltage portion of the line is at a second voltage potential. As a result, latch-up of the circuit can be prevented.