The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 18, 2001

Filed:

Aug. 12, 1999
Applicant:
Inventors:

Woon-kyung Lee, Suwon, KR;

He-jueng Lee, Cheonan, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/176 ;
U.S. Cl.
CPC ...
H01L 2/176 ;
Abstract

A method for fabricating a mask ROM capable of effectively reducing the distance of buried impurity diffusion regions. The method includes stacking a pad oxide layer and a first anti-oxidation layer in sequence in a cell array region and a peripheral circuit region of a semiconductor substrate. The anti-oxidation layer is partially etched to form a first pattern defining an isolation region of the peripheral circuit region and a second pattern defining a buried impurity diffusion region of the cell array region, and a second anti-oxidation layer is stacked, and then the second anti-oxidation layer stacked in the peripheral circuit region is removed, so that the second anti-oxidation layer stacked in the cell array region remains. Then, a field oxide layer is formed in the isolation region of the peripheral circuit region, exposed by the remaining second anti-oxidation layer; and impurities are implanted to form the buried impurity diffusion region.


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