Method for forming different types of mos transistors on a semiconductor wafer

Abstract

A semiconductor wafer has a substrate, a first region in the substrate that is used for a logic circuit, and a second region in the substrate that is used for a memory cell. A first gate in the first region and a second gate in the second region are simultaneously formed on the substrate. The first gate and the second gate both include a gate dielectric layer, a polysilicon layer, a tungsten silicide layer and a cap layer, in ascending order. The cap layer and the tungsten silicide layer are then removed from the first gate. A spacer around each gate is then formed. This completes the second type MOS transistor in the memory cell of DRAM. A titanium silicide layer on the surface of the substrate adjacent to the first gate and on the surface of the polysilicon layer of the first gate is formed so as to complete the formation of the first type MOS transistor.