The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 28, 2001
Filed:
Dec. 21, 1998
Ryoichi Takagi, Tokyo, JP;
Katsushi Asahina, Tokyo, JP;
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Abstract
Provided is a semiconductor device having an I/O buffer cell capable of performing a timing verification test of high accuracy. A phase comparator (,) compares the phase of data (DATA) and that of a clock (CLK) and outputs a phase comparison result to a first input of an MUX (,). A test mode signal (STM,) inputted from a test mode terminal (,) is provided to the control input of the MUX (,) through a test mode input section (,). The MUX (,) receives at its second input the output signal of an internal logic (,) through a signal input section (,) and, based on the test mode signal (STM,), outputs either the phase comparison result or the output signal of the internal logic (,), to the input section of a driver (,).