The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 21, 2001
Filed:
Jun. 10, 1998
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A method of fabricating an integrated circuit, and an integrated circuit so fabricated, is disclosed. A silicon dioxide layer (,) that is doped with both boron and phosphorous, typically referred to as BPSG, is used as a planarizing layer in the integrated circuit structure, above which conductive structures (,) are disposed. A silicon nitride layer (,) is in place below the BPSG layer (,), and serves as a barrier to the diffusion of boron and phosphorous from the BPSG layer (,) during high temperature processes such as reflow and densification of the BPSG layer (,) itself. Contact openings (PC, BLC, CT) are etched through the BPSG layer (,) and the silicon nitride layer (,) using a two-step etch process. The first etch selectively etches silicon dioxide relative to silicon nitride, and thus stops on silicon nitride layer (,); besides serving as an etch stop, silicon nitride layer (,) protects underlying active regions (,) from damage that may be caused by ionized oxygen released during oxide etch. A brief nitride etch is then used to clear silicon nitride layer (,), without damaging comer locations (NC) of the sidewall structures (,).