Method of manufacturing a dram capacitor

Abstract

A capacitor is provided, which makes it easy to increase the opposing area size between the lower and upper electrode in spite of miniaturization, and which ensures a desired capacitance value large enough for stable operation of a semiconductor memory device in spite of miniaturization. The capacitor is comprised of a lower electrode formed over an interlayer dielectric layer of a substrate, an upper electrode, and a dielectric located between the lower and upper electrodes. The lower electrode has a first electrode part and a second electrode part connected to each other. The first electrode part includes a plate-shaped bottom subpart and a sidewall subpart extending upward from the periphery of the bottom subpart. The bottom subpart and the sidewall subpart form an inner space. At least part of the second electrode part is located in the inner space so that a first gap is formed between the bottom subpart and the second electrode part and a second gap is formed between the sidewall subpart and the second electrode part. The upper electrode is opposed to the bottom subpart of the first electrode part of the lower electrode and to the second electrode part thereof in the first gap, and is opposed to the sidewall subpart of the first electrode part of the lower electrode and to the second electrode part thereof in the second gap.