The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 07, 2001
Filed:
Oct. 29, 1999
Gordon M. Grivna, Mesa, AZ (US);
Richard A. Keating, Phoenix, AZ (US);
Gordon C. Ma, Phoenix, AZ (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
A method of manufacturing a semiconductor component includes sequentially disposing a first electrically conductive layer (,), a dielectric layer (,), and a sacrificial layer (,) over a substrate (,). An etch mask is used to defined a gate stack (,) comprised of the sacrificial layer (,), the dielectric layer, and the first electrically conductive layer. Another dielectric layer (,) is deposited over the substrate (,) and the gate stack (,). This second dielectric layer (,) is planarized to expose the sacrificial layer (,). The sacrificial layer (,) of the gate stack (,) and the dielectric layer (,) of the gate stack (,) are sequentially removed, and another electrically conductive layer (,) is deposited over the first electrically conductive layer of the gate stack to form a gate electrode made of, among other features, two electrically conductive layers.