The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 07, 2001
Filed:
Dec. 22, 2000
Chong-Jen Huang, San-Chung, TW;
Hsin-Huei Chen, Miao-Li, TW;
Lenvis Liu, Hsin-Chu, TW;
Tony Wang, Tao-Yuan, TW;
Frank Chiou, Chi-Lung, TW;
Abstract
A method for manufacturing a flash memory device with dual floating gates is disclosed. The method use a self-align etching technique to form dual floating gates by using dual spacers as masks. First of all, a semiconductor substrate having a first insulating layer thereon and a first conductive layer formed over the first insulating layer is provided. Then a second insulating layer is formed and patterned to etch to form a trench therein. Next a dielectric layer is deposited and anisotropically etched to form dual spacers in the trench. After removing the second insulating layer, etching the first conductive layer to expose the first insulating layer, and removing the spacers sequentially, dual floating gates are formed. Two doped regions separately located on two sides of said dual floating gates are then formed by using a photolithography and an ion implantation processes After thickening the first insulating layer, a composite layer, a second conductive layer and a third insulating layer is formed over the semiconductor substrate sequentially.