The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 07, 2001

Filed:

Jul. 15, 1999
Applicant:
Inventors:

Ravindranath Droopad, Chandler, AZ (US);

Zhiyi Yu, Gilbert, AZ (US);

Jamal Ramdani, Gilbert, AZ (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
C30B 1/00 ;
U.S. Cl.
CPC ...
C30B 1/00 ;
Abstract

A method for fabricating a semiconductor structure including the steps of providing a silicon substrate (,) having a surface (,); forming an interface including a seed layer (,) adjacent to the surface (,) of the silicon substrate (,), forming a buffer layer (,) utilizing molecular oxygen; and forming one or more layers of a high dielectric constant oxide (,) on the buffer layer (,) utilizing activated oxygen.


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Droopad, Ravindranath. (2001). Method for fabricating a semiconductor structure with reduced leakage current density (U.S. Patent No. 6270568). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6270568

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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