The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 31, 2001
Filed:
Apr. 12, 2000
Bhimachar Venkatesh, Cupertino, CA (US);
Edward V. Bautista, Jr., Santa Clara, CA (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
The present invention discloses a method of providing a voltage to a plurality of wordlines during the Automatic Program Disturb Erase Verify (APDEV) operation in a memory device. During the APDEV operation, the voltage is supplied to the wordlines sequentially from two energy sources; a charge share circuit and a temperature compensated bias generator circuit. The respective voltages from the two energy sources are applied to the wordlines to charge the wordlines to a bias voltage. The bias voltage is the appropriate voltage on the wordlines to allow the memory device to verify that the bitline current flow is not excessive in the erased memory sector at the present operating temperature of the memory device. The amount of voltage needed to create the bias voltage is dependent on the operating temperature of the memory device.