Semiconductor memory device with overdriven sense amplifier and stabilized power-supply circuit of source follower type

Abstract

To reduce current consumption, there is provided a circuit for each bank, comprising selection circuits,through,each for selecting either a normal supply voltage Vii or a higher supply voltage Vjj as a supply voltage VH,in response to a selection control signals SC,and *SC,a selection control circuit,for generating the signals SC,and *SC0 to make the selection circuits select Vii when a bank activation signal BRAS,is inactive and Vjj for a predetermined period in response to activation of BRAS,and sense amplifier driving circuits,through,for supplying the ground voltage and VH,to the sense amplifier rows in response to activation of sense amplifier control signals. To stabilize the output voltage Vii of the power supply circuit having a NMOS transistor, the drain electrode, gate and source electrodes of which are at VCC, VG and approximately Vii=VG−Vth, where Vth is the threshold voltage of the NMOS transistor,a leak circuit is employed. The leak circuit has a NMOS transistor connected between Vii and ground. Wasteful power consumption by the current flowing to the leak circuit is negligibly small, e.g. 1 to 10 &mgr;A, and the variation of the supply voltage Vii reduces effectively.