The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 17, 2001
Filed:
Apr. 13, 2000
Ian MacPherson Flanagan, Minneapolis, MN (US);
Dayanand K. Reddy, Minneapolis, MN (US);
LSI Logic Corporation, Milpitas, CA (US);
Abstract
A phase-locked loop (PLL) is provided, which includes a PLL reference input, a PLL output and a phase detection loop coupled between the PLL reference input and the PLL output. The phase detection loop has a loop filter node. A delay element is coupled within the phase detection loop and has a variable delay, which can be increased to a critical delay at which the phase detection loop becomes unstable. A demodulator is coupled to the loop filter node and is adapted to demodulate a modulated voltage on the loop filter node. The demodulator has a demodulated output, which is representative of a phase margin of the phase detection loop when the delay element has the critical delay.