Method and structure for detecting open vias in high density interconnect substrates

Abstract

A method for testing for open circuits on a common circuit base having pads for making electrical contact to the common circuit base on both the top and bottom of the circuit base. The common circuit base includes a thin film metal interconnect structure formed on its upper surface and the thin film interconnect structure including an upper dielectric layer deposited over a thin film metalization layer that has contact openings etched through the dielectric layer at selected locations for the formation of contact pads. The method includes the steps of (1) forming a seed layer over the upper dielectric layer and over the contact openings; (2) forming a photoresist layer over the seed layer and patterning the photoresist layer to expose selected portions of the seed layer such that the selected portions correspond generally to the contact openings; (3) plating a conductive layer over the patterned seed layer to form plated contact pads that are electrically connected to an underlying thin film metalization layer; and (4) inspecting the plated conductive layer for open circuits prior to performing subsequent process steps and/or tests. In different embodiments, such subsequent process steps and/or tests include: stripping the photoresist in areas where the contact pads are not formed to expose the seed layer underlying the photoresist; removing the exposed seed layer and performing an electrical test on the common circuit base to determine if any short circuits exist in the interconnect structure.