The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 10, 2001
Filed:
Apr. 01, 1999
Ritu Shrivastava, Fremont, CA (US);
Alliance Semiconductor Corporation, San Jose, CA (US);
Abstract
Provided is a method of forming self-aligned contacts in salicided MOS devices that provides improved reliability and decreased resistance relative to conventional tungsten polycide processing. Self-aligned contacts in salicided MOS devices are also provided. The method makes use of a metal, preferably titanium or cobalt, which is deposited on the devices' gates and diffusion regions and converted to a silicide with a resistance substantially less than that of tungsten silicide, preferably by RTA processing. A self-aligned contact etch stop mask is then formed over the gates and a portion of sidewall spacers on the gates. The presence of this “oversize” self-aligned contact etch stop mask prevents shorting of the subsequently deposited contact interconnect material to the gates, while allowing silicidation of the diffusion regions as well as the gates with a low resistance silicide, thereby improving device reliability and decreasing resistance.