The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 26, 2001
Filed:
Apr. 21, 1999
Applicant:
Inventor:
Premal Buch, Daly City, CA (US);
Assignee:
Magma Design Automation, Inc., Cupertino, CA (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/750 ;
U.S. Cl.
CPC ...
G06F 1/750 ;
Abstract
A method for designing a sequence of logic gates in a path is described. In one embodiment, the method includes modeling gate delay as a function of input slew and output load using a delay model and adjusting electrical efforts in each stage to reduce the gate delay along the path. In one embodiment, the electrical efforts in each stage are adjusted to minimize the delay along the path, where the delay along the path is minimized when a product of logical effort and electrical effort associated with each gate is the same.