The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 26, 2001

Filed:

Aug. 24, 1998
Applicant:
Inventors:

Robert M. Salter, III, Saratoga, CA (US);

Robert J. Lipp, Los Gatos, CA (US);

Kyung Joon Han, Cupertino, CA (US);

Jack Zezhong Peng, San Jose, CA (US);

Assignee:

Actel Corporation, Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/9788 ;
U.S. Cl.
CPC ...
H01L 2/9788 ;
Abstract

A programmable interconnect cell for selectively connecting circuit nodes of a field programmable integrated circuit array in a semiconductor substrate includes a switch field effect transistor, a sense field effect transistor, and an electron tunneling device with the transistors and electron tunneling device having interconnected floating gates and interconnected control gates. The floating gates comprise a first polysilicon layer which is restricted to each cell, and the control gates comprise a second polysilicon layer which extends to adjacent cells in the row. The source/drain regions of the sense transistor extend to source/drain regions of sense amplifiers in adjacent rows. Programming and erasing of the switch transistor is effected entirely by electron tunneling in the electron tunneling device.


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