The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 19, 2001
Filed:
Apr. 23, 1997
Thornton W. Sargent, IV, Redwood City, CA (US);
Douglas W. Smith, Portola Valley, CA (US);
inTest Sunnyvale Corporation, Sunnyvale, CA (US);
Abstract
A bi-directional interface for transmitting signals between a circuit tester and a connection point proximate to a circuit to be tested includes a first and a second optical fiber link, a first directional gate for coupling both the input end of the first link and the output end of the second link to one endpoint of the interface and a second directional gate for coupling both the input end of the second link and the output end of the first link to the other endpoint of the interface. An optical fiber link for transmitting a signal between a circuit tester and a connection point proximate to a circuit to be tested includes an optical fiber for transmitting the signal, a light source electrically coupled to the link input and optically coupled to the input of the fiber, and a photodetector optically coupled to the fiber output and electrically coupled to the link output. The light source may include a light emitter and a driver stage electrically coupled to the light emitter. The link input may include a load adapter or a programmable load to receive the signal for the driver stage. For processing the output of the photodetector the link may have a receiver stage, followed by an equalizer stage, followed by a high-pass filter stage, followed by a power output stage.