The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 05, 2001

Filed:

Feb. 22, 2000
Applicant:
Inventor:

Shih-Chin Lin, Keohsiung, TW;

Assignee:

United Microelectronics Corp., Hsin-Chu City, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 ; G11C 1/124 ;
U.S. Cl.
CPC ...
G11C 7/00 ; G11C 1/124 ;
Abstract

In accordance with the present invention, a method is provided for testing dynamic random access memory under wafer-level-burn-in that substantially can overcome the disadvantage of requiring at a manufacturing period and which even further increases with the increase of the memory capacity being expanded. In the embodiment, first of all, there are pluralities of word lines that are arranged in parallel. Generally word line driver means respectively driving the word lines and concludes word line test means for receiving a test signal, and further for producing an output signal. The layout of input bit-line to bit-line can be cross-arranged. Thus, the main feature of the present invention is mentioned that voltage for bit-line can be divided as even-numbered voltage and odd-numbered voltage for cross toggling. Especially, all of the tests can be carried out in the fabrication period of a semiconductor factory. Also, the semiconductor memory device of this invention overcomes the above-identified problem and numerous other disadvantages and deficiencies of the conventional technology.


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