The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 05, 2001
Filed:
Nov. 15, 1999
Ling-Sung Wang, Hsinchu, TW;
Chia-Chen Liu, Hsinchu, TW;
Worldwide Semiconductor Manufacturing Corp., Taiwan, TW;
Abstract
A method for manufacturing an erasable programmable memory is disclosed, and an enlargement of the coupling area between control and floating gates is employed to increase the capacitive-coupling ratio. Firstly, the isolation regions are formed on the substrate. A polysilicon layer is formed on a portion of the control region of the substrate to form an uneven silicon surface. An ion implantation is carried out to form the doped tunnel region and the control gate. A tunnel oxide layer and a non-tunnel oxide layer are formed on the doped tunnel region, and an inter-poly dielectric is formed on the control gate. A floating gate is now deposited on the doped tunnel region and the control gate. Then an inter-layer dielectric is formed and etched to provide the isolation and connect between control gate and interconnects.