The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 29, 2001
Filed:
Jun. 03, 1998
Bi-Ling Chen, Taipei, TW;
Erik S. Jeng, Taipei, TW;
Vanguard International Semiconductor Corporation, Hsin-Chu, TW;
Abstract
The practice of forming self-aligned contacts (SACs) in MOSFETs using a silicon nitride gate sidewall and a silicon nitride gate cap has found wide acceptance, particularly in the manufacture of DRAMs, where bitline contacts are formed between two adjacent wordlines, each having a nitride sidewall. The contact etch requires a an RIE etch having a high oxide/nitride selectivity. In order to etch SACs having widths of less than 0.35 microns at their base, such as are encountered in high density DRAMs, special steps must be taken to prevent polymer bridging across the opening which leaves residual insulative material at the base of the contact. The problem is further complicated when the insulative layer through which the opening is formed comprises a silicate glass such as BPSG over a silicon oxide layer. The invention discloses the use of an etchant gas mixture containing octafluorocyclobutane and CH,F in combination with a small but critical concentration of oxygen to etch the SAC opening cleanly and without deleterious erosion of silicon nitride sidewall insulation. The added oxygen prevents polymer bridging across the narrow portion of the SAC.