The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 29, 2001

Filed:

Apr. 30, 1999
Applicant:
Inventors:

Amir Wachs, Haifa, IL;

David Cohen, Nesher, IL;

Assignee:

Tower Semiconductor Ltd., Migdal Haemex, IL;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 3/126 ;
U.S. Cl.
CPC ...
G01R 3/126 ;
Abstract

A method of quality control in the fabrication of semiconductor devices. During and after the deposition and patterning of two successive layers on a semiconductor wafer, two independent measures of the alignment of the two layers are obtained. From each of these measures of the alignment, there is obtained a measure of the quality of a corresponding model of the alignment. These two measures of the quality of the models are compared. In one preferred independent measure of model quality, the model is a model of upper layer misalignment that is constructed by the stepper that positions the wafer for the patterning of the upper layer. In another preferred independent measure of model quality, the model is a model of mutual layer misalignment that is determined from mutual displacement of the overlay keys of the two layers. The measures of model quality are based on the residuals of these models.


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