Semiconductor integrated circuit and semiconductor memory device including overdriving sense amplifier

Abstract

A transistor of a driver in the semiconductor integrated circuit according to the present invention has its gate connected to a controlling circuit, and has its drain connected to a sense amplifier. The controlling circuit supplies the gate of the transistor with a gate-to-source voltage exceeding or below other power supply voltages. The drain-to-source resistance of the transistor in the on state becomes sufficiently lower as compared with that in the case of supplying the power supply voltages between the gate and source of the transistor. Accordingly, the amplifying speed of the sense amplifier is heightened without altering the sense amplifier and the driver. Besides, the amplifying speed of the sense amplifier is heightened without raising the power supply voltage which supplies the carriers to the driver. The semiconductor memory device according to the present invention switches the driving supply voltage for the sense amplifier from the first supply voltage, to the second supply voltage lower than the first voltage. The timing at which the first supply voltage is switched to the second supply voltage is controlled in accordance with the voltage on a dummy bit line which is driven by a monitoring sense amplifier. Accordingly, even when the driving speed of the sense amplifier using the overdriving system has fluctuated due to the fluctuation of the first supply voltage, the driving supply voltage of the sense amplifier can be always switched to the second supply voltage at the appropriate timing.