The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 22, 2001
Filed:
Aug. 10, 1998
Applicant:
Inventors:
William B. Vest, Santa Clara, CA (US);
John C. Costello, San Jose, CA (US);
Assignee:
Altera Corporation, San Jose, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F 3/08 ; H02M 3/18 ; G11C 7/00 ;
U.S. Cl.
CPC ...
G05F 3/08 ; H02M 3/18 ; G11C 7/00 ;
Abstract
A system for generating voltages on an integrated circuit utilizes an overlapping clocking scheme. An oscillator generates the overlapping clock signals, which are coupled through oscillator buffers, to row pumps. In response to the overlapping clock signals, row pumps generate high voltages, typically higher than the VDD voltage of the integrated circuit. These high voltages may be used to program programmable memory cells or interface to logic components of the integrated circuit.
Vest, William. (2001). High voltage pump scheme incorporating an overlapping clock (U.S. Patent No. 6236260). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6236260
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile