Methods of forming ferroelectric random access memory devices having shared capacitor electrodes

Abstract

Methods of forming FRAM devices include the steps of forming first and second field effect access transistors in a semiconductor substrate, forming first and second bit lines (BL) electrically coupled to a drain region of the first field effect access transistor and a drain region of the second field effect access transistor, respectively, and forming first and second ferroelectric capacitors (C,) between the first and second bit lines in order to improve integration density. These first and second ferroelectric capacitors share a first electrode extending between the first and second bit lines and have respective second electrodes electrically coupled to respective source regions of the first and second field effect access transistors. The preferred methods may also include the step of forming a field oxide isolation region adjacent a face of the substrate and extending between the first and second field effect access transistors. In addition, a step may be provided to form a first interlayer dielectric layer on the first and second field effect access transistors and on the field oxide isolation region. The step of forming the first and second ferroelectric capacitors may also comprise the preferred steps of forming a first conductive layer on the first interlayer dielectric layer, forming a ferroelectric dielectric layer (e.g., PZT, PLZT) on the first conductive layer, forming a second conductive layer on the ferroelectric dielectric layer, patterning the second conductive layer and the ferroelectric dielectric layer using a first mask to define the second electrodes of the first and second ferroelectric capacitors and then patterning the first conductive layer using a second mask to define the first electrode which is shared by the first and second ferroelectric capacitors.