Chip scale package and method for manufacturing the same using a redistribution substrate

Abstract

A method for manufacturing a chip scale package includes: providing a redistribution substrate; attaching a semiconductor wafer to the redistribution substrate; forming external terminals on the redistribution substrate; and separating the semiconductor wafer and the redistribution substrate into individual integrated circuits. The method can further include forming a buffer layer by filling a gap between the semiconductor wafer and the redistribution substrate with a dielectric material. Another method is the same as the method described above except that instead of the semiconductor wafer, individual integrated circuit chips attach to the redistribution substrate. Meanwhile, a semiconductor package includes: a semiconductor integrated circuit having chip pads formed thereon; interconnection bumps overlying on the chip pads; a patterned metal layer connecting to the interconnetion bumps; a first dielectric layer under the patterned metal layer; a second dielectric layer overlying on the patterned metal layer; and terminal pads connecting to the patterned metal layer. The semiconductor package can further include external terminals connecting to the terminal pads, a third dielectric layer filling a gap between the first dielectric layer and the semiconductor integrated circuit.