The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 15, 2001

Filed:

Feb. 23, 1999
Applicant:
Inventors:

Yinon Degani, Highland Park, NJ (US);

Dean Paul Kossives, Glen Gardner, NJ (US);

Assignee:

Lucent Technologies, Murray Hill, NJ (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/144 ;
U.S. Cl.
CPC ...
H01L 2/144 ;
Abstract

The specification describes techniques for applying solder bumps to IC chips. The solder bump sites are first provided with under bump metallization (UBM) for solder bump interconnections to the Al bonding sites on the IC chip. The substrate, i.e. the capping layer of the IC chip, is coated with photoresist and patterned to expose the UBM and a peripheral portion of the capping layer around the UBM. The solder paste is then applied and reflowed to form the solder bump. Since the photoresist hardens and becomes difficult to remove after the reflow step, a sacrificial buffer layer is interposed between the photoresist and the capping layer to facilitate removal of the photoresist without attacking the IC chip surface.


Find Patent Forward Citations

Degani, Yinon. (2001). Flip chip bump bonding (U.S. Patent No. 6232212). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6232212

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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