Electrode resistance improved mosfet with source and drain regions reduced in size beyond lithography limit and method for making the same

Abstract

A MOSFET whose source and drain regions are reduced in size beyond lithography limit is improved with a reduction of electrode contact resistance by forming a silicide on the gate electrode layer and the source and drain regions thereof. In a method for making the MOSFET, a sacrificial layer is formed in stack on a gate electrode layer of a silicon rich material before source and drain regions are implanted or diffused with the sacrificial layer and gate electrode layer as a mask, an insulator spacer is then formed on sidewalls of the gate electrode layer and the sacrificial layer so that a trench is formed on the gate electrode layer and surrounded by the spacer in the subsequent process when the sacrificial layer is removed, a metal is deposited in the trench and on the source and drain regions with a portion extending to an isolation region which surrounds the MOSFET and practiced with a heat treatment to form a silicide on the gate electrode layer and the source and drain regions, and finally a dielectric layer is deposited on the metal in which contact holes are then formed and a conductive material is filled into the contact holes to reach the metal.