Multiple use chip socket for integrated circuits and the like

Abstract

A multiple use chip socket supporting more than one type of permanent storage chip in a single chip socket is disclosed. The multiple use chip socket provides a plurality of address bit lines which are used to specify an address of a particular location within a memory device installed in the socket. In general, the number of address bit lines directly coupled to the socket correspond to the number of address bit lines required for the smallest memory device to be installed in the socket. Additional address bit lines are coupled to control logic of the present invention. The control logic selectively applies addressing signals to the chip socket depending on the type of memory device inserted in the socket. As part of the initialization process, the processing logic of the present invention first determines if an access to a device installed in the chip socket is required by a circuit board as part of its initialization or boot process. If such an access is required, the processing logic then determines if a device is installed in the chip socket. If a device is installed in the chip socket, the processing logic then determines if the device is a flash device or an EPROM device or other type of device. In this manner, the accessing signals appropriate for the particular type of device can be configured.