Complementary heterostructure integrated single metal transistor apparatus

Abstract

An enhancement mode periodic table group III-IV semiconductor field-effect transistor complementary pair device is disclosed. The disclosed complementary pair include single metallization for ohmic and Schottky barrier contacts, a permanent non photosensitive passivation layer (a layer which has also been used for masking purposes during fabrication of the device) and gate elements of small dimension and shaped cross section to provide desirable microwave spectrum electrical characteristics. The complementary pair of the invention is fabricated from undoped semiconductor materials disposed in a layered wafer structure and selectively doped by ion implantation to achieve both the p-channel and n-channel transistors. The semiconductor materials may include two, one or zero buffer layers in their layer structure. The disclosed complementary pair is of reduced fabrication cost, increased dimensional accuracy and state of the art electrical performance.