The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 17, 2001
Filed:
Jul. 21, 1998
Gregor Braeckelmann, Austin, TX (US);
Ramnath Venkatraman, Austin, TX (US);
Matthew Thomas Herrick, Austin, TX (US);
Cindy R. Simpson, Austin, TX (US);
Robert W. Fiordalice, Austin, TX (US);
Dean J. Denning, Del Valle, TX (US);
Ajay Jain, Austin, TX (US);
Cristiano Capasso, Austin, TX (US);
Motorola Inc., Schaumburg, IL (US);
Abstract
An interconnect (,) is formed overlying a substrate (,). In one embodiment, an adhesion/barrier layer (,), a copper-alloy seed layer (,), and a copper film (,) are deposited overlying the substrate (,), and the substrate (,) is annealed. In an alternate embodiment, a copper film is deposited over the substrate, and the copper film is annealed. In yet another embodiment, an adhesion/barrier layer (,), a seed layer (,), a conductive film (,), and a copper-alloy capping film (,) are deposited over the substrate (,) to form an interconnect (,). The deposition and annealing steps can be performed on a common processing platform.