The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 10, 2001

Filed:

Jun. 17, 1996
Applicant:
Inventors:

Hideto Hidaka, Hyogo, JP;

Takahiro Tsuruda, Hyogo, JP;

Katsuhiro Suma, Hyogo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/972 ;
U.S. Cl.
CPC ...
H01L 2/972 ;
Abstract

In manufacturing a semiconductor device, the thickness of source and drain regions is maintained equal by performing the same number of etching steps on each source and drain region. This procedure can be applied to various types of semiconductor devices, such as a memory cell transistor of a DRAM, stack-type memory cell transistor of a DRAM, a peripheral circuit of a DRAM, a semiconductor device formed on an SOI structure, and a trench-type memory cell of a DRAM formed on an SOI structure. By maintaining the source and drain regions at the same thickness, the resistance values are maintained, thereby avoiding deterioration of the transistor characteristics.


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