The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 10, 2001
Filed:
May. 18, 1998
Applicant:
Inventors:
Assignee:
Samsung Electronics Co., Ltd., Suwon, KR;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/1311 ; H01L 2/14763 ; H01L 2/1302 ; H01L 2/1461 ;
U.S. Cl.
CPC ...
H01L 2/1311 ; H01L 2/14763 ; H01L 2/1302 ; H01L 2/1461 ;
Abstract
A method for planarizing a semiconductor substrate uses a difference in etch selectivity of insulators on the semiconductor substrate. The method comprises the steps of wet-etching the second and first insulating layers at upper edges of the elevated region until portions of the first insulating layer are exposed at the upper edges, forming a third insulating layer on the first and second insulating layers, and wet-etching the third and second insulating layers until an upper surface of the first insulating layer is exposed. During the wet-etching, the second insulating layer is etched faster than the third insulating layer. With this method, the semiconductor substrate has an even surface.