The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 27, 2001
Filed:
Nov. 01, 1996
Applicant:
Inventors:
Robert L. Maziasz, Austin, TX (US);
Mohankumar Guruswamy, Austin, TX (US);
Srilata Raman, Austin, TX (US);
Assignee:
Motorola, Inc., Schaumburg, IL (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/750 ;
U.S. Cl.
CPC ...
G06F 1/750 ;
Abstract
A method of automatically placing transistors of a folded transistor circuit for synthesizing rows of transistors in a semiconductor layout (,). First, an initial placement of transistors is generated (,). Next, a candidate move of transistors is selected (,). Then the change in cost of the placement resulting from applying the candidate move is evaluated (,). A decision is made to accept the candidate move based on the evaluation of its cost (,). If accepted, the move is performed (,) and the cost of the placement is updated (,). Finally, a decision to terminate the process is made (,).
Published as: