The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 27, 2001

Filed:

Oct. 22, 1999
Applicant:
Inventors:

Hervé Jaouen, Meylan, FR;

Richard Ferrant, Saint Ismier, FR;

Assignee:

STMicroelectronics S.A., Gentilly, FR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 1/124 ;
U.S. Cl.
CPC ...
G11C 1/124 ;
Abstract

A DRAM made in monolithic form, the cells of which each include a MOS transistor and a capacitor, a second electrode of which is common to all cells of a same row and is covered with an insulator, the insulator being coated with independent conductive elements distributed on a same horizontal plane, two neighboring elements being biased to respective high and low levels.


Find Patent Forward Citations

Jaouen, Hervé. (2001). Memory circuit architecture (U.S. Patent No. 6208551). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6208551

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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