The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 27, 2001

Filed:

Jun. 28, 1999
Applicant:
Inventors:

Keng L. Wong, Portland, OR (US);

Gregory F. Taylor, Portland, OR (US);

Ravishankar Kuppuswamy, Hillsboro, OR (US);

Douglas R. Parker, Forest Grove, OR (US);

Hung-Piao Ma, Portland, OR (US);

Kent R. Callahan, Hillsboro, OR (US);

Xia Dai, Chavez Way, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 1/9096 ;
U.S. Cl.
CPC ...
H03K 1/9096 ;
Abstract

An apparatus and method for detecting and measuring internal clock jitter is disclosed. In one embodiment, a reference clock generator generates a reference clock signal based on an instantaneous clock signal. The reference clock signal includes the instantaneous clock signal delayed for an average duration. A phase comparing element receives both the instantaneous clock signal and the reference clock signal such that the phase comparing element measures a phase difference between the instantaneous clock signal and the reference clock signal. The magnitude and direction of the phase difference is indicated by one of a number of distinct phase difference bins in the phase comparing element.


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