The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 27, 2001
Filed:
Jun. 07, 1995
Douglas Adam Cywar, Danbury, CT (US);
Elizabeth Foster, Friendsville, PA (US);
Stephen Leo Tisdale, Vestal, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
The method for forming circuitization of the present invention provides a circuitized product which does not have a blanket seed layer and only has seed layer under the metal circuitization. Thus, short circuits between circuit lines are eliminated. It is a further advantage of the method of the present invention that it does not involve stripping portions of the seed layer. The method of the present invention requires less processing steps than conventional methods and employs positive resists which are developable by aqueous alkaline solutions. Specifically, the method of the present invention for forming circuitization in a circuit board comprising the following steps: providing a dielectric substrate; applying a positive photoresist to the dielectric substrate; then exposing the positive resist through art work corresponding to the desired circuit pattern; then developing the resist with an aqueous alkaline solution to form the circuit pattern in the resist; then applying a seeding composition to the patterned substrate of step d; exposing the remaining resist to actinic radiation; developing the remaining acidified resist with an aqueous alkaline solution to remove photoresist not coated with seed to form a seed pattern; and then electrolessly plating metal onto the seed pattern so as to form the metallized circuit pattern.