The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 20, 2001
Filed:
Feb. 26, 1998
Daisuke Maruyama, Kawasaki, JP;
Fujitsu Limited, Kawasaki, JP;
Abstract
A fault simulation method in which a sufficient diagnostic rate is ensured by enabling a fault in a circuit area forward of a storage element to be handled as an object to be detected, to thereby increase the speed of detection of a fault; i.e., the speed of fault simulation. In the fault simulation method, the integrated circuit is divided into a backward circuit area, which is a combinational circuit area on the output-pin side of a storage element included in the integrated circuit, and a forward circuit area, which is a combinational circuit area on the input-pin side of the storage element. When a fault which propagates to input pins of the storage element exists in the forward circuit area, the value of the fault at that observation time is written into the storage element, and at a later observation time the value of the fault is read from the storage element and propagated to the backward circuit area from output pins of the storage element. The present invention is used when the serviceability of an integrated circuit, such as an LSI or an LSI-equipped printed board, is verified through use of test patterns.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile