Programmable clock signal generation circuits and methods for generating accurate, high frequency, clock signals

Abstract

A circuit and method is described which generates a high frequency clock signal whose frequency is accurate enough to be used for testing other circuitry, yet the circuit can be described using a hardware description language so that it is suitable for logic synthesis and automatic layout. The technique uses a plurality of programmable ring oscillators and means to select and enable one of the ring oscillators. The output frequency is measured relative to that of a lower frequency reference signal, and when the output frequency is incorrect, a different ring oscillator is selected or the present ring oscillator's frequency is changed. Circuitry is included to prevent glitches at the output of the clock generator when the frequency is changed, regardless of how the ring oscillators are constructed. One or more of the delay stages in the ring oscillators contain parallel 3-state logic gates which allow delay changes less than the delay of a single non-inverting delay gate, and this allows the frequency to be very accurately controlled.