The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 20, 2001

Filed:

Sep. 13, 1999
Applicant:
Inventors:

Chuen-Der Lien, Los Altos Hills, CA (US);

Chun-Ya Chen, San Jose, CA (US);

Pauli Hsueh, San Jose, CA (US);

Ta-Ke Tien, Cupertino, CA (US);

Leonard Perham, Monte Sereno, CA (US);

Assignee:

Integrated Device Technology, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/348 ;
U.S. Cl.
CPC ...
H01L 2/348 ;
Abstract

An integrated circuit structure that includes a patterned uppermost conductive layer having a current-carrying trace. The current-carrying trace is connected to an underlying substrate by a multi-layer interconnect structure. The current-carrying trace, which is located around the outer edges of the integrated circuit structure, has at least one edge exhibiting a serpentine pattern. A topside film is located over the patterned uppermost conductive layer, wherein the topside film exhibits an increased thickness adjacent to the serpentine pattern. The increased thickness of the serpentine pattern results in a relatively strong topside film structure near the edges of the substrate. As a result, the portions of the topside film located over inner traces of the uppermost conductive layer are protected from excessive forces during thermal cycling.


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