Method of making integrated circuit capacitor including tapered plug

Abstract

A method of making a capacitor includes the steps of forming an interconnection line above a substrate, depositing a first dielectric layer on the interconnection line, and etching a via in the first dielectric layer. The via has a tapered width which increases in a direction toward the substrate. Further, the method includes filling the via with a conductive metal to form a metal plug, and etching a trench in the first dielectric layer around an upper portion of the metal plug. The metal plug has a tapered width which secures it into the dielectric layer. A second dielectric layer is deposited adjacent the metal plug and an upper electrode is deposited on the second dielectric layer. Preferably, a lower electrode is deposited to line the trench and contact the metal plug.