Method of forming high aspect ratio structures for semiconductor devices

Abstract

Exemplary embodiments of the present invention disclose process steps to form high aspect ratio structures, such as a capacitor during semiconductor fabrication by the steps of: forming a first layer of planarized boro-phospho-silicate glass (BPSG) material over a conductive region; forming a first opening in said first layer of planarized BPSG material, said first opening aligning to said conductive region; forming a planarized polysilicon material into said first opening; forming a second layer of planarized BPSG material directly on said first layer of planarized BPSG material and said planarized polysilicon material; forming a second opening in said second layer of planarized BPSG material to expose a major portion of said planarized polysilicon material; removing said planarized polysilicon material to expose said underlying conductive region, said step of removing said planarized polysilicon comprises an etch possessing an etching selectivity ratio of polysilicon material to BPSG material that is greater than,; forming a conformal conductive silicon layer into said first and second openings that makes contact with said conductive region; patterning said conformal conductive silicon layer into a first capacitor plate; forming a capacitor dielectric over said first capacitor plate, said first capacitor plate having an aspect ratio with the length being greater than the width; forming a second capacitor plate over said capacitor dielectric.