The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 13, 2001
Filed:
Dec. 28, 1999
Applicant:
Inventors:
Simon M. Tam, Redwood City, CA (US);
Stefan Rusu, Sunnyvale, CA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/06 ; H03L 7/08 ; G06F 1/04 ; G06F 1/10 ;
U.S. Cl.
CPC ...
H03L 7/06 ; H03L 7/08 ; G06F 1/04 ; G06F 1/10 ;
Abstract
An on-die clock generator. For one aspect of the invention, the on-die clock generator includes a phase-locked loop (PLL) circuit having a first input coupled to receive an external clock signal and an output coupled to provide an on-die clock signal to be used during a normal operating mode of an integrated circuit. The on-die clock generator also includes a local clock generator circuit having an input coupled to receive the on-die clock signal and an output coupled to provide a local PLL feedback clock signal to a second input of the PLL.