Method for fabricating high-voltage device

Abstract

A method for providing triangle shapes of high-density plasma CVD film, thereby the grad and source/drain implantation can be applied in the same step, and an offset source/drain mask layer can be eliminated. A substrate is provided incorporating a device, wherein the device is defined as a high-voltage MOS region. Sequentially, a plurality of field oxides are formed on the substrate, one of the field oxides is spaced from another of the field oxides by a high-voltage MOS region. Then, a gate oxide layer is formed above the silicon substrate. Moreover, a polysilicon layer is deposited over the gate oxide layer. A photoresist layer is formed above the polysilicon layer and gate oxide layer, wherein the photoresist layer is defined and etched to form a gate. Then, the photoresist layer is removed. Consequentially, a dielectric layer is deposited and etched above the polysilicon layer by using high-density plasma CVD to result in the inherit triangle shape of high-density plasma CVD film characteristic. N-type ions are implanted into the silicon substrate to form N-type grad therein, and then N,-type ions only penetrate through the flat high-density plasma CVD dielectric film and not the triangle shape high-density plasma CVD film to form source/drain regions inside the N-type grad.