The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 13, 2001

Filed:

Aug. 14, 1998
Applicant:
Inventors:

Min-Jung Kim, Kyunggi-do, KR;

Sang-Cheol Lee, Seoul, KR;

Byung-Hyug Roh, Kyunggi-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/14763 ; H01L 2/144 ; H01L 2/131 ; H01L 2/1469 ;
U.S. Cl.
CPC ...
H01L 2/14763 ; H01L 2/144 ; H01L 2/131 ; H01L 2/1469 ;
Abstract

Insulated electrodes are formed by first forming on an integrated circuit substrate, an insulating layer, a conductive layer on the insulating layer, and a metal silicide layer on the conductive layer, and then forming a metal silicon nitride layer on the metal silicide layer. The metal silicon nitride layer acts as a silicon protrusion-preventing layer on the metal silicide layer that prevents formation of silicon protrusions from the metal silicide layer during subsequent processing. Reliability and/or yield problems that are caused by undercutting of an insulation layer in an insulated electrode may also be reduced by forming on an integrated circuit substrate, an insulating layer, conductive layer on the insulating layer and a metal silicide layer on the conductive layer. The metal silicide layer and the conductive layer are selectively etched to define an insulated electrode including a sidewall while also undesirably undercutting the insulating layer relative to the conductive layer thereon to define an undercut region. A conformal silicon nitride layer is coated on the integrated circuit substrate, including on the sidewall and in the undercut region. The conformal silicon nitride layer plugs the undercut insulating layer with silicon nitride, to thereby reduce reliability and/or yield problems.


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