The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 06, 2001
Filed:
Jun. 29, 1999
Andreas M. Haeberli, Campbell, CA (US);
Carl W. Werner, San Jose, CA (US);
Cheng-Yuan Michael Wang, San Jose, CA (US);
Hock C. So, Redwood City, CA (US);
Leon Sea Jiunn Wong, Sunnyvale, CA (US);
Sau C. Wong, Hillsborough, CA (US);
SanDisk Corporation, Sunnyvale, CA (US);
Abstract
Level shifter circuits are used to configure analog or multilevel memory cells. A level shifter circuit generates an output voltage that is above the input voltage by an offset voltage value. The magnitude of this offset voltage or the relationship between the input and output voltages of the level shifter is adjustable or programmably selectable. Adjustments can be made after the integrated circuits is fabricated and packaged. Adjustments are made by configuring bits of data in the integrated circuit to indicate the offset voltage or other parameters. These configuration bits are implemented using latches, flip-flops, registers, memory cells, or other storage circuits.