Device for neutralizing an electronic circuit

Abstract

A device is provided for neutralizing an electronic circuit whose rate is set by a clock signal in the event of an anomaly in the clock signal. The device includes an inhibition circuit for selectively inhibiting operation of the electronic circuit, and an anomaly detector for activating the inhibition circuit to inhibit operation of the electronic circuit as soon as an anomaly is detected in the clock signal. In one preferred embodiment, the anomaly detector includes two monostable circuits and a logic circuit. The first monostable circuit receives the clock signal and outputs a first pulse at each trailing edge of the clock signal, and the second monostable circuit receives the clock signal and outputs a second pulse at each leading edge of the clock signal. The logic circuit receives the first and second pulses and outputs an activation signal to the inhibition circuit whenever the clock signal shows an anomaly. Also provided is a memory device that includes at least one neutralization device for neutralizing the memory device in the event of an anomaly in a clock signal.