The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 30, 2001

Filed:

Apr. 24, 2000
Applicant:
Inventor:

Chao-Chieh Tsai, Hsih-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/18234 ;
U.S. Cl.
CPC ...
H01L 2/18234 ;
Abstract

A new method is provided for the creation of a high Q inductor that can be applied together with the mounting of flip chip semiconductor die on a substrate. The process of the invention starts with a semiconductor surface over which a layer of insulation and intra-metal dielectric have been deposited with interconnect patterns created in said layers of insulation and dielectric. A layer of low-K polyimide is deposited over the surface of the intra-metal dielectric, active circuits have previously been created in the substrate. After the layer of low-K polyimide has been deposited, a redistribution pattern is defined in the layer of low-K poly. Metal is deposited that forms the redistribution metal, the deposited layer of metal is planarized thereby forming the metal redistribution pattern. The inductor is next defined, the inductor is created on the surface of the layer of low-K polyimide. A layer of poly is deposited over the created inductor, back-end processing is then performed that creates openings for the BGA contact points that are to be established with the active devices in the substrate via BGA's or other methods of interconnect.


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