The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 30, 2001

Filed:

Dec. 13, 1999
Applicant:
Inventors:

Sik On Kong, Singapore, SG;

Dai Feng, Singapore, SG;

Yung-Tao Lin, Singapore, SG;

Robert Chin Fu Tsai, Singapore, SG;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/100 ;
U.S. Cl.
CPC ...
H01L 2/100 ;
Abstract

A method of fabricating an LCD-on-silicon device, comprising the following steps. A semiconductor structure having a control transistor formed therein is provided. The control transistor having a source and a drain. An interlevel dielectric (ILD) layer over the semiconductor structure is provided. Source/drain (S/D) plugs contacting the source and drain through contact openings in said ILD layer are provided. M1 lines are formed over the ILD layer and connected to at least the S/D plugs. An M1 intermetal dielectric (IMD) layer is deposited and patterned over the M1 lines to form M1 contact openings exposing at least some of the M1 metal lines. M1 metal plugs are formed within the M1 contact openings and M2 metal islands connected to, and integral with, at least the M1 metal plugs. The M2 metal islands having exposed side walls. Sidewall spacers are formed on the exposed M2 metal islands side walls. A second M2 metallization layer is deposited and patterned over the M2 metal islands to form a shielding layer adjacent to and contiguous with the sidewall spacers. The M2 metal islands, sidewall spacers, and shielding layer form a light shielding layer. At least one additional dielectric and conductive layer is formed over the light shielding layer and the M1 intermetal dielectric (IMD) layer. LCD pixels are then formed thereover.


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